// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Model implementation (design independent parts)

#include "Vverilog__pch.h"

//============================================================
// Constructors

Vverilog::Vverilog(VerilatedContext* _vcontextp__, const char* _vcname__)
    : VerilatedModel{*_vcontextp__}
    , vlSymsp{new Vverilog__Syms(contextp(), _vcname__, this)}
    , input_1{vlSymsp->TOP.input_1}
    , input_2{vlSymsp->TOP.input_2}
    , and_result{vlSymsp->TOP.and_result}
    , rootp{&(vlSymsp->TOP)}
{
    // Register model with the context
    contextp()->addModel(this);
}

Vverilog::Vverilog(const char* _vcname__)
    : Vverilog(Verilated::threadContextp(), _vcname__)
{
}

//============================================================
// Destructor

Vverilog::~Vverilog() {
    delete vlSymsp;
}

//============================================================
// Evaluation function

#ifdef VL_DEBUG
void Vverilog___024root___eval_debug_assertions(Vverilog___024root* vlSelf);
#endif  // VL_DEBUG
void Vverilog___024root___eval_static(Vverilog___024root* vlSelf);
void Vverilog___024root___eval_initial(Vverilog___024root* vlSelf);
void Vverilog___024root___eval_settle(Vverilog___024root* vlSelf);
void Vverilog___024root___eval(Vverilog___024root* vlSelf);

void Vverilog::eval_step() {
    VL_DEBUG_IF(VL_DBG_MSGF("+++++TOP Evaluate Vverilog::eval_step\n"); );
#ifdef VL_DEBUG
    // Debug assertions
    Vverilog___024root___eval_debug_assertions(&(vlSymsp->TOP));
#endif  // VL_DEBUG
    vlSymsp->__Vm_deleter.deleteAll();
    if (VL_UNLIKELY(!vlSymsp->__Vm_didInit)) {
        vlSymsp->__Vm_didInit = true;
        VL_DEBUG_IF(VL_DBG_MSGF("+ Initial\n"););
        Vverilog___024root___eval_static(&(vlSymsp->TOP));
        Vverilog___024root___eval_initial(&(vlSymsp->TOP));
        Vverilog___024root___eval_settle(&(vlSymsp->TOP));
    }
    VL_DEBUG_IF(VL_DBG_MSGF("+ Eval\n"););
    Vverilog___024root___eval(&(vlSymsp->TOP));
    // Evaluate cleanup
    Verilated::endOfEval(vlSymsp->__Vm_evalMsgQp);
}

//============================================================
// Events and timing
bool Vverilog::eventsPending() { return false; }

uint64_t Vverilog::nextTimeSlot() {
    VL_FATAL_MT(__FILE__, __LINE__, "", "%Error: No delays in the design");
    return 0;
}

//============================================================
// Utilities

const char* Vverilog::name() const {
    return vlSymsp->name();
}

//============================================================
// Invoke final blocks

void Vverilog___024root___eval_final(Vverilog___024root* vlSelf);

VL_ATTR_COLD void Vverilog::final() {
    Vverilog___024root___eval_final(&(vlSymsp->TOP));
}

//============================================================
// Implementations of abstract methods from VerilatedModel

const char* Vverilog::hierName() const { return vlSymsp->name(); }
const char* Vverilog::modelName() const { return "Vverilog"; }
unsigned Vverilog::threads() const { return 1; }
void Vverilog::prepareClone() const { contextp()->prepareClone(); }
void Vverilog::atClone() const {
    contextp()->threadPoolpOnClone();
}