$version Generated by VerilatedVcd $end
$timescale 1s $end
 $scope module TOP $end
  $var wire 1 # i_clk $end
  $var wire 8 $ o_led [7:0] $end
  $scope module wave $end
   $var wire 1 # i_clk $end
   $var wire 8 $ o_led [7:0] $end
   $var wire 1 % direction $end
  $upscope $end
 $upscope $end
$enddefinitions $end


#0
1#
b00000001 $
0%
#5
0#
#10
1#
b00000010 $
#15
0#
#20
1#
b00000100 $
#25
0#
#30
1#
b00001000 $
#35
0#
#40
1#
b00010000 $
#45
0#
#50
1#
b00100000 $
#55
0#
#60
1#
b01000000 $
#65
0#
#70
1#
b10000000 $
1%
#75
0#
#80
1#
b01000000 $
#85
0#
#90
1#
b00100000 $
#95
0#
#100
1#
b00010000 $
#105
0#
#110
1#
b00001000 $
#115
0#
#120
1#
b00000100 $
#125
0#
#130
1#
b00000010 $
#135
0#
#140
1#
b00000001 $
0%
#145
0#
#150
1#
b00000010 $
#155
0#
#160
1#
b00000100 $
#165
0#
#170
1#
b00001000 $
#175
0#
#180
1#
b00010000 $
#185
0#
#190
1#
b00100000 $
#195
0#