`include "memoryandvideo.v"

`include "ALU.v"


`include "Conditional.v"



module computer(clk, videoSignal, reset, PC, ACC);

  output videoSignal;
  input clk, reset;
  
  reg [7:0] X;
  reg [7:0] MP;
  wire [7:0] IN;
  assign IN=8'h0;
  output reg [7:0] ACC;
  
  
  
  always @(posedge clk)
    if(reset)
      begin
      X  <=8'h0;
      MP <=8'h0;
      ACC<=8'h0;
      end
    else
      case(RegisterSel)
        2'h0:PP <=Y;
        2'h1:MP <=Y;
        2'h2:ACC<=Y;
        default:X<=Y;
      endcase
  
  reg carryReg;
  always @(posedge clk)
    if(reset)
      carryReg<=1'h0;
    else if( !OperationSel[1] & OperationSel[2] )
      carryReg<=carry;
      
       
  
  
  wire [7:0] memData;
  
  reg [7:0] B;
  wire [7:0] AddressBus;
  assign AddressBus = AddressBusSel ? X : InstructionData;
  /*assign AddressBus = case(AddressBusSel)
    1'h0: InstructionData,
    default: X;
  endcase;*/
  
  
  //assign B = memData;
  always @(*)
    case (BusSel)
      2'h0: B=memData;
      2'h1: B=InstructionData;
      2'h2: B=IN;
      default: B=ACC;
    endcase
  /*case (BusSel) 
    2'h0: memData,
    2'h1: InstructionData,
    2'h2: IN,
    default: ACC;
  endcase;*/
  
  wire carry;
  wire [7:0] Y;
  
  wire condition;
  
  output reg [15:0] PC;
  always @(posedge clk)
    if(reset)
      PC<=16'h0;
    else
      PC<= &{OperationSel,condition} ? {PP,AddressBus} : PC+1;
  
  reg [7:0] PP;
  
  wire [15:0] instruction;
  wire AddressBusSel;
  wire [1:0] RegisterSel;
  wire [1:0] BusSel;
  wire [2:0] OperationSel;
  wire [7:0] InstructionData;
  assign {OperationSel, BusSel, RegisterSel, AddressBusSel, InstructionData } = instruction;
  
  
  
  
  //ROM ROM(PC,instruction);
  assign instruction = program_rom[PC];
  
  ALU ALU(ACC,B,OperationSel,carry,Y);
  
  Conditional Conditional(ACC,instruction[12:10],carryReg,condition);
  

  
  memoryandvideo memoryandvideo(clk,{MP,AddressBus},OperationSel ==3'h6,B, memData,videoSignal);

  // program ROM ($8000-$FFFE)
  reg [15:0] program_rom[0:(1<<16)-1];
  
  // example ROM program code
//`ifdef EXT_INLINE_ASM
  initial begin
    program_rom 
    = '{/*16'h0cff,16'hd800,*/16'he000,((1<<16)-1){16'h0}};/*'{16'h0c0d,16'hd800,16'h0c00,
            16'hd801,16'h0c01,16'hd802,
            16'hd804,16'h0404,16'ha400,
            16'he415,16'h0401,16'h8402,
            16'hd803,16'h0402,16'hd801,
            16'h0403,16'hd802,16'h0404,
            16'h8c01,16'hd804,16'he007,
            16'h0401,16'he016
            ,((1<<16)-23){16'h0}};*//*'{
      __asm
.arch arch
.len 65536
.define pixelX 8
.define pixelY 9
.define returnPos 10
.define shift0 248
.define shift1 249
.define shift2 250
.define shift3 251
.define shift4 252
.define shift5 253
.define shift6 254
.define shift7 255

load op acc op 1
store acc op shift0
add acc acc op 0
store acc op shift1
add acc acc op 0      
store acc op shift2
add acc acc op 0      
store acc op shift3
add acc acc op 0      
store acc op shift4
add acc acc op 0      
store acc op shift5
add acc acc op 0      
store acc op shift6
add acc acc op 0      
store acc op shift7
      
begin:
Load op acc op 1
store acc op pixelX
store acc op pixelY
Load op acc op end
store acc op returnPos

  
jmp alw op fillPixel


end:
Jmp Alw Op begin
  
;put the pixel coordinate in pixelX and pixelY
;and the return address instruction in returnPos

fillPixel:

;ACC = pixelX
Load mem acc op pixelX
;X = Acc+ 248
add op x op 248
;ACC = mem[x]
load mem acc x 0
;X = PixelY
load mem x op pixelY
;MEM[X] = ACC
store acc x 0
;jump to returnPos
load mem X op returnPos
jmp alw x 0
      __endasm
    };*/
  end
  
  

endmodule