module ROM(address, data);
  input  [15:0] address;
  output [15:0] data;
  
  reg [15:0] MEM [0:(1<<16)-1];
  assign data = MEM[address];
  
  initial 
    MEM = '{16'h0c0d,16'hd800,16'h0c00,
            16'hd801,16'h0c01,16'hd802,
            16'hd804,16'h0404,16'ha400,
            16'he415,16'h0401,16'h8402,
            16'hd803,16'h0402,16'hd801,
            16'h0403,16'hd802,16'h0404,
            16'h8c01,16'hd804,16'he007,
            16'h0401,16'he016
            ,((1<<16)-23){16'h0}};
endmodule