ELF>@@E=0GNUOw4wwKHH?HHoQH1҃2C1fDLw6wtK/HH?HH=xNH1҃3CfDw@Lw"t>:w/HHH80MH1ff.HGHH@xHx1ff.fS1IA HHHGHXxHHC HC(H;Hss@HC(HC8HC0SZH[ff.@ATUS1HeL$%(Ld$IHT$D$L'ff.ff.ft##D$tLuHD$eH+%(u H[]A\HG`1Ʌ1E1E1H@ H@xHxjZtt!HG(HXH@xxp1DSHG1HXxH{H{{@u1[1[ff.USHGHHhx}@uFH1HHH}H}H}1[]fDATUSHLgxHtQIc$H~H HHHt-HIc $H¾!H߉[]A\fDHHWxHHtHc HVH!Dtt!HG(HXH@xxp1DSHHF`eH%(H\$HHT$D$H@H@xHxCfDAUHATUSHHoLgeH%(H\$HD$L@LHXLHT$D$uoDjE1E1tL@LE1j+E1@{LY^LHH{fHLHH{HD$eH+%(H[]A\A]HsHHjE1E11ɺLE1E1j1ɾLXZRHsHH@AULo ATUSHHeL$%(Ld$ID$ HI$11LHHCH={L+A$C@jLtCTDDDDDDDDDDDHk1H1HH{XHT$ HkjE1E1@@fHE1E1jvHKLE1E1j0fHE1E1 j HE1E1@#H @#vHjE1E1 j?KHE1E1jjHE1E11jHE1E1ɹ,H |sHjKHE1ɺjE1tHE1E1j+HE1E11j,HKhE1E1H Hj{S_A$SHHLHT$eH+%(H[]A\A]KpHHHKlHHHKdHHHfK\HHHCKXHHH KLHHHKHHHHKTHHHKRHHHKQHHHoKPHHHK xLHH<HLHLCPHLCQHLCRHLClHSTLCSHtCTHSHHLtCHHSLHLtCLHSXHLtCXHS\HLtC\HSdHLtCd.HShHLtChHSpHLCp}NHHHPH+sKPHkjE1E1HKQE1E1jH KRE1E1jH CT1ɺj HE1E1KXE1E1H HjK\E1E1j HE1E1hjhHE1E1jHH jE1E1 kHE1E1jtHY^4Cp}=wH+,fDAVAUATIUSHHoeL,%(Ll$AՃntefjE1E11ɺHE1E11j HE1E11jHH%umjE1E1HXA\$Df1HT$eH+%(H[]A\A]A^I4$ADHH뺃jE1E1jE1E11ɺHE1E11j HE1E11jHE1E11jHH "HT$ H$D$HDt$H$AAA8jE1E1 HE1E1jHE1E1jHE1E1jH@E1E1H @ HjZ-jE1E11 HGHxxATUSHeH%(HD$1 toHG(HXHhxDLeHT$ $D$LL\$H$1҃8u,HkHD$eH+%(u7H1[]A\1HBHuHH^ff.@ATE1E11UtHSH_LgjHE1E11j HHI$@LHE1E1jHE1E1jHE1E1HH  jA<$_vvj1ɾ+E1E1@HulYu []A\jHE1E1HE1jE1XZ[]A\11HyUSHGHXxHkt 1[]DEuH11K{@tHLE1E11jHE1E1j HE1E11jHHpj1ɾ E1E1Hs@YHjE1E11HtHHE1jE1X1Z[]ff.ATUSHLfeH,%(Hl$HHT$D$LfT$Ѓ Ӄ@@L@@H}HT$eH+%(JH[]A\HuL$HHT$Ѓ {jE1E1qLH6 L_^€uЃt.LHL@!jE1E11ɺqL LHT$D$D$L\$HT$D$^8H] HH5Hڿ@E1E1jLE1E1jLHEZH]Y8jE1E1HE1E11jHE1E11j HE1E11jHE1E1H 1ɾHjT$ XW1ҾHRO5NovD]dn  !  *3=a  %V\u%GN $V_ mv5]g* [hr [ eq d[   >FPmu %    5 r       f w [   ) G      [.  U  @    [! [C  \ $\5Yy  4 p; Gs $ *Ut $  $  ? $@R ,Y H^h     bq13Rq,S Z  b    ~ 8 ` p F  , % / 4C M PRa k p      0 T i #* 5< J` e    -  I/ d7R {Zu `z 3Ww, QIZ a hf0h O O%U  #- Q| $ ARq, K g      !L!T!!!!! ! !"("O"f"""""k"""#;#m#####$ S@H;HD$D$HLHLD$D$I<$HH}HHT$H}H1 3$ ,1: FOb\ ak$v H{LB" !HH # (H nau8821_print_device_propertiesnau8821_read_device_propertiessystem_clock_controldmic_clock_controlnau8821_set_fllynau8821_i2c_probeunau8821_jdet_worknau8821_configure_sysclknau8821_interruptnau8821_enable_jack_detect{NVTN2020nau8821Positivo Tecnologia SACW14Q01P-V2&)Mtrr    s s ss     KK     v  K\T` 82|8` 9 9 9 9 8888 8 ,+P@ i 1 &  !"#$%&'()*+,-/01245678%9W4:;<%=W4ABCDEFGHIJKLMSتTUfhijkqr stvw~ @@ }@ @   0 `quirk@ H P \ d  @     (0 < D  p      $ @ HHP \ d  p   (I8 H Xh p P X  `  h x   8  D  K  80  P  [  j  o  ~@  [P  $  o  $    [`  p  o      0      8    8@ P     ` p     0     @ P     ` p     0  $  < @ TP $ l <  T` p l    0     @ P     ` p   ( Ph $ P ( h [0  o! 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(A hB jC ~D K(F hG H DHHHH I (I0I8I@IPPHI @`I xIIII@PI I -IIII0PI @J >J J(J0J P8J PJ VhJpJxJJPJ @J jJJJJPJ J KKK KO(K @@K XK`KhKpKOxK K KKKKVK KLLL@V0L HLPLXLhLUL LLLLTL LLLMT M p8M@MHMXM SpM MMMM@RM MMMM@QN !(N0N8NHN`P`N 4xNNNN @N FNNNN@XO ZO O(O8OWPO phOpO0xOO O OOOO `pPPP P P P Q Q Q Q  Q (Q 0Q PQQQ Q Q Q Q Q Q Q R R R R  R PRRR R R R R R R R S S 0SSS S S S S S S S S S TTT T T T T T T T T@U@U HU PU XU `U hU pU xU UVV V V V  V (V 0V 8V PVVV V V V`W`W hW pW xW WXX X #X 'X  X +PXXX +X X 'X #GPL (`0$8t@HP$X`4hpx$ 4  T P$TP!nau8821Cannot request irq %d (%d) MICBIASHeadset connected Headphone connected nuvoton,jkdet-enablenuvoton,jkdet-pull-enablenuvoton,jkdet-pull-upnuvoton,key-enablenuvoton,left-input-single-endnuvoton,jkdet-polaritynuvoton,micbias-voltagenuvoton,vref-impedancenuvoton,jack-insert-debouncenuvoton,jack-eject-debouncenuvoton,dmic-clk-thresholdnuvoton,dmic-slew-ratenuvoton,adc-delay-msjkdet-enable: %d jkdet-pull-enable: %d jkdet-pull-up: %d jkdet-polarity: %d micbias-voltage: %d vref-impedance: %d jack-insert-debounce: %d jack-eject-debounce: %d dmic-clk-threshold: %d key_enable: %d adc-delay-ms: %d Invalid clock id (%d) failed to read irq status IRQ %d sound/soc/codecs/nau8821.c4%s %s: 3snd_soc_nau8821nau8821-hifiCapturePlaybackDMIC EnableSwitchDMICDMIC ClockFrontend PGA LMICLFrontend PGA RMICRADCL PowerADCR PowerADCL Digital pathADCR Digital pathAIFTXSystem ClockAIFRXDDACLDDACRHP amp LHP amp RCharge PumpADACLADACRADACL ClockADACR ClockOutput Driver L Stage 1Output Driver R Stage 1Output Driver L Stage 2Output Driver R Stage 2Output Driver L Stage 3Output Driver R Stage 3Output DACLOutput DACRHPOL PulldownHPOR PulldownHP Boost DriverClass GHPOLHPORMic VolumeHeadphone Bypass VolumeHeadphone VolumeDigital Playback VolumeFrontend PGA VolumeHeadphone Crosstalk VolumeADC DRC KNEE4ADC DRC KNEE3ADC DRC Noise GateADC DRC Expansion SlopeADC DRC Lower RegionADC DRC Higher RegionADC DRC Limiter SlopeADC DRC Attack TimeADC DRC Decay TimeDRC Enable SwitchADC Decimation RateDAC Oversampling RateBIQ CoefficientsADC Phase Switch63Ts127Ts255Ts511Ts1023Ts2047Ts4095Ts8191Ts16383Ts32757Ts65535TsTs3Ts7Ts15Ts31Ts01:21:41:81:161:321:641:12:14:18:16425612832clk_adc=%d, dmic_clk_threshold = %d, param=%d, val = %d Unsupported input clock %d to output clock %d mclk_src=%x ratio=%x fll_frac=%x fll_int=%x clk_ref_div=%x Please set the suitable delay time! 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