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@+=HHt$HHHH11HHHw @$ۀLd$( 1LH @t @HHHHHH@HeH%(H$1HIt(wЃ=ttHtH91LLlj$DŽ$ HD$HDŽ$H$eH+%(tHHHH1HHHH1HHD$L$HT$ L$t$ PD$PDL$"DD$ XZL$Aȉ‰HL$D L$H1HSE1EHDKH[]A\A]A^1HHHHHHHHH뵾HH([]A\A]A^A_HHD$H묉HHD$HyHHWHFD H5H HHD$HHHL$L$HH[]A\HHHHHHt$H5HHHAt$HE5f{ufCsH5{tDHDH5D$H[H]HHHHHHHHH0[]HHHHHHs HHH1HH1H@H1H1H1뫉H1H1HH1{11CjH?SsHsH1HHHH1HH;1HHHHHHHHHHL$AHщHH;L $HL$AHщHH;L $HH ڃD$Du At$HDAHDSDSDD$XH[]A\A]A^A_HHHHHHHHA}t+AuHHH([]A\A]A^A_H1҉HHA׾HHHHHHHT$T$HHHT$T$HIHHADHHIHHADHHIHHDHHIHHAADHHIHHADHLHA4$HHA$USt HH1f-HHffHHHfǃH HuHtHtHHtHtHHtHtHHtHtHWHyH25=ffy"HH[]register_serial_portandirqmwave_initEX]ejqv~mwave_readmwave_writemwave_ioctl '2=EOZdn{mwave_opendgmwave_closequmwave_exit:mwave_uart_iomwave_uart_irqmwave_3780i_iomwave_3780i_irqmwave_debugsmapi_init &.07smapi_set_DSP_power_statesmapi_set_DSP_cfg 0Pesmapi_requestJnzsmapi_query_DSP_cfg00N000Pp tp3780I_ReadWriteDspIStore'9tp3780I_ReadWriteDspDStoretp3780I_QueryAbilitiestp3780I_StartDSPtp3780I_ResetDSPtp3780I_DisableDSPEnableSRAML\UartInterruptbDspInterruptnrytp3780I_EnableDSP$.6?Jgnqztp3780I_ReleaseResourcestp3780I_ClaimResourcestp3780I_CalcResourcestp3780I_Cleanuptp3780I_InitializeBoardDatadsp3780I_GetIPCSourcedsp3780I_WriteIStoredsp3780I_ReadIStore_zdsp3780I_WriteDStore6JRdsp3780I_ReadAndClearDStore  (dsp3780I_ReadDStoredsp3780I_Rundsp3780I_Resetdsp3780I_DisableDSPi{dsp3780I_WriteGenCfgtzdsp3780I_EnableDSP"*6N[dsp3780I_WriteMsaCfgbdsp3780I_ReadMsaCfgNXmwavedd::mwave_write entry file %p, buf %p, count %zx ppos %p mwavedd::mwave_read entry file %p, buf %p, count %zx ppos %p mwavedd::mwave_ioctl, entry file %p cmd %x arg %x mwavedd::mwave_ioctl, IOCTL_MW_RESET calling tp3780I_ResetDSP mwavedd::mwave_ioctl, IOCTL_MW_RESET retval %x from tp3780I_ResetDSP mwavedd::mwave_ioctl, IOCTL_MW_RUN calling tp3780I_StartDSP mwavedd::mwave_ioctl, IOCTL_MW_RUN retval %x from tp3780I_StartDSP mwavedd::mwave_ioctl, IOCTL_MW_DSP_ABILITIES calling tp3780I_QueryAbilities mwavedd::mwave_ioctl, IOCTL_MW_DSP_ABILITIES retval %x from tp3780I_QueryAbilities mwavedd::mwave_ioctl, IOCTL_MW_DSP_ABILITIES exit retval %x mwavedd::mwave_ioctl IOCTL_MW_READ_DATA, size %lx, ioarg %lx pusBuffer %p mwavedd::mwave_ioctl IOCTL_MW_READ_INST, size %lx, ioarg %lx pusBuffer %p mwavedd::mwave_ioctl IOCTL_MW_WRITE_DATA, size %lx, ioarg %lx pusBuffer %p mwavedd::mwave_ioctl IOCTL_MW_WRITE_INST, size %lx, ioarg %lx pusBuffer %p 3mwave: mwavedd::mwave_ioctl: IOCTL_MW_REGISTER_IPC: Error: Invalid ipcnum %x mwavedd::mwave_ioctl IOCTL_MW_REGISTER_IPC ipcnum %x entry usIntCount %x mwavedd::mwave_ioctl IOCTL_MW_REGISTER_IPC ipcnum %x exit 3mwave: mwavedd::mwave_ioctl: IOCTL_MW_GET_IPC: Error: Invalid ipcnum %x mwavedd::mwave_ioctl IOCTL_MW_GET_IPC ipcnum %x, usIntCount %x mwavedd::mwave_ioctl, thread for ipc %x going to sleep mwavedd::mwave_ioctl IOCTL_MW_GET_IPC ipcnum %x handling first int mwavedd::mwave_ioctl IOCTL_MW_GET_IPC ipcnum %x woke up and returning to application mwavedd::mwave_ioctl IOCTL_MW_GET_IPC, returning thread for ipc %x processing mwavedd::mwave_ioctl IOCTL_MW_UNREGISTER_IPC ipcnum %x 3mwave: mwavedd::mwave_ioctl: IOCTL_MW_UNREGISTER_IPC: Error: Invalid ipcnum %x mwavedd::mwave_ioctl, exit retval %x 3mwave: mwavedd::register_serial_portandirq: Error: Illegal port %x 3mwave: mwavedd::register_serial_portandirq: Error: Illegal irq %x &pDrvData->IPCs[i].ipc_wait_queuemwavedd::mwave_init, return from tp3780I_InitializeBoardData retval %x 3mwave: mwavedd::mwave_init: Error: Failed to initialize board data mwavedd::mwave_init, return from tp3780I_CalcResources retval %x 3mwave: mwavedd:mwave_init: Error: Failed to calculate resources mwavedd::mwave_init, return from tp3780I_ClaimResources retval %x 3mwave: mwavedd:mwave_init: Error: Failed to claim resources mwavedd::mwave_init, return from tp3780I_EnableDSP retval %x 3mwave: mwavedd:mwave_init: Error: Failed to enable DSP 3mwave: mwavedd:mwave_init: Error: Failed to register misc device 3mwave: mwavedd:mwave_init: Error: Failed to register serial driver 3mwave: mwavedd::mwave_init: Error: Failed to initialize mwavedd::mwave_close, entry inode %p file %p mwavedd::mwave_close, exit retval %x mwavedd::mwave_open, entry inode %p file %p mwavedd::mwave_open, exit return retval %x inBX %x inCX %x inDI %x inSI %x myoutAX %x myoutBX %x myoutCX %x myoutDX %x myoutDI %x myoutSI %x usSmapiOK %x smapi::smapi_request exit retval %x smapi::smapi_query_DSP_cfg entry 3mwave: smapi::smapi_query_DSP_cfg: Error: Could not get DSP Settings. Aborting. smapi::smapi_query_DSP_cfg, smapi_request OK smapi::smapi_query_DSP_cfg get DSP Settings bDSPPresent %x bDSPEnabled %x usDspIRQ %x usDspDMA %x usDspBaseIO %x 3mwave: smapi::smapi_query_DSP_cfg: Worry: DSP base I/O address is 0 3mwave: smapi::smapi_query_DSP_cfg: Worry: DSP IRQ line is 0 smapi::smapi_query_DSP_cfg: Error: Could not get DSP modem settings. Aborting. smapi::smapi_query_DSP_cfg get DSP modem settings bModemEnabled %x usUartIRQ %x usUartBaseIO %x 3mwave: smapi::smapi_query_DSP_cfg: Worry: UART base I/O address is 0 3mwave: smapi::smapi_query_DSP_cfg: Worry: UART IRQ line is 0 smapi::smapi_query_DSP_cfg exit bRC %x smapi::smapi_set_DSP_cfg entry mwave_3780i_irq %x mwave_3780i_io %x mwave_uart_irq %x mwave_uart_io %x 3mwave: smapi::smapi_set_DSP_cfg: Error: Invalid mwave_3780i_irq %x. Aborting. 3mwave: smapi::smapi_set_DSP_cfg: Error: Invalid mwave_uart_io address %x. Aborting. 3mwave: smapi::smapi_set_DSP_cfg: Error: Invalid mwave_uart_irq %x. Aborting. 3mwave: smapi::smapi_set_DSP_cfg: Serial port A irq %x conflicts with mwave_uart_irq %x 3mwave: smapi::smapi_set_DSP_cfg: Serial port A base I/O address %x conflicts with mwave uart I/O %x 3mwave: smapi::smapi_set_DSP_cfg: Serial port B irq %x conflicts with mwave_uart_irq %x 3mwave: smapi::smapi_set_DSP_cfg: Serial port B base I/O address %x conflicts with mwave uart I/O %x 3mwave: smapi::smapi_set_DSP_cfg: IR port irq %x conflicts with mwave_uart_irq %x 3mwave: smapi::smapi_set_DSP_cfg: IR port base I/O address %x conflicts with mwave uart I/O %x smapi::smapi_set_DSP_cfg exit 3mwave: smapi::smapi_set_DSP_cfg exit on smapi_request error bRC %x 3mwave: smapi::smapi_set_DSP_cfg: Error: Invalid mwave_3780i_io address %x. Aborting. smapi::smapi_set_DSP_power_state entry bOn %x smapi::smapi_set_DSP_power_state exit bRC %x smapi::smapi_init usSmapiID %x smapi::smapi_init, ERROR unable to read from SMAPI port smapi::smapi_init, exit true g_usSmapiPort %x smapi::smapi_init, ERROR invalid usSmapiID tp3780i::UartInterrupt entry irq %x dev_id %p tp3780i::DspInterrupt entry irq %x dev_id %p tp3780i::DspInterrupt, return from dsp3780i_GetIPCSource, usIPCSource %x tp3780i::DspInterrupt usPCNum %x usIPCSource %x tp3780i::DspInterrupt usIntCount %x tp3780i::DspInterrupt, waking up usPCNum %x tp3780i::DspInterrupt, no one waiting for IPC %x tp3780i::DspInterrupt, return false from dsp3780i_GetIPCSource tp3780i::tp3780I_InitializeBoardData entry pBDData %p 3mwave: tp3780i::tp3780I_InitializeBoardData: Error: SMAPI is not available on this machine tp3780i::tp3780I_InitializeBoardData exit retval %x tp3780i::tp3780I_Cleanup entry and exit pBDData %p tp3780i::tp3780I_CalcResources entry pBDData %p 3mwave: tp3780i::tp3780I_CalcResources: Error: Could not query DSP config. Aborting. 3mwave: tp3780i::tp3780I_CalcResources: Error: Illegal resource setting. Aborting. tp3780i::tp3780I_CalcResources exit tp3780i::tp3780I_ClaimResources entry pBDData %p 3mwave: tp3780i::tp3780I_ClaimResources: Error: Could not claim I/O region starting at %x tp3780i::tp3780I_ClaimResources exit retval %x tp3780i::tp3780I_ReleaseResources entry pBDData %p tp3780i::tp3780I_ReleaseResources exit retval %x tp3780i::tp3780I_EnableDSP entry pBDData %p 3mwave: tp3780i::tp3780I_EnableDSP: Error: DSP already enabled! 3mwave: tp3780::tp3780I_EnableDSP: Error: pSettings->bDSPEnabled not set 3mwave: tp3780i::tp3780I_EnableDSP: Error: invalid irq %x 3mwave: tp3780i::tp3780I_EnableDSP: Error: Invalid DSP base I/O address %x 3mwave: tp3780i::tp3780I_EnableDSP: Error: Invalid UART IRQ %x tp3780i::tp3780I_EnableDSP: Error: Invalid UART base I/O address %x 3mwave: tp3780i::tp3780I_EnableDSP: Error: Could not get UART IRQ %x tp3780i::tp3780I_EnableDSP: Error: Could not get 3780i IRQ %x tp3780i::tp3780I_EnableDSP, got interrupt %x bShareDspIrq %x 3mwave: tp3780i::tp3780I_EnableDSP: Error: smapi_set_DSP_power_state(true) failed tp3780i::tp3780I_EnableDSP: Error: dsp7880I_EnableDSP() failed tp3780i::tp3780I_EnableDSP: Cleaning up tp3780i::tp3780I_EnableDSP exit tp3780i::tp3780I_DisableDSP entry pBDData %p tp3780i::tp3780I_DisableDSP exit retval %x tp3780i::tp3780I_ResetDSP entry pBDData %p tp3780i::tp3780I_ResetDSP exit retval %x tp3780i::tp3780I_StartDSP entry pBDData %p tp3780i::tp3780I_StartDSP exit retval %x tp3780i::tp3780I_QueryAbilities entry pBDData %p tp3780i::tp3780I_QueryAbilities exit retval=SUCCESSFUL tp3780i::tp3780I_ReadWriteDspDStore entry pBDData %p, uOpcode %x, pvBuffer %p, uCount %x, ulDSPAddr %lx tp3780i::tp3780I_ReadWriteDspDStore exit retval %x tp3780i::tp3780I_ReadWriteDspIStore entry pBDData %p, uOpcode %x, pvBuffer %p, uCount %x, ulDSPAddr %lx tp3780i::tp3780I_ReadWriteDspIStore exit retval %x 3780i::dsp3780i_WriteGenCfg entry usDspBaseIO %x uIndex %x ucValue %x 3780i::dsp3780i_WriteGenCfg rSlaveControl %x 3780i::dsp3780i_WriteGenCfg entry rSlaveControl+ConfigMode %x 3780i::dsp3780i_WriteGenCfg exit 3780i::dsp3780I_ReadMsaCfg entry usDspBaseIO %x ulMsaAddr %lx 3780i::dsp3780I_ReadMsaCfg exit val %x 3780i::dsp3780i_WriteMsaCfg entry usDspBaseIO %x ulMsaAddr %lx usValue %x 3780i::dsp3780I_EnableDSP entry pSettings->bDSPEnabled %x 33780i::dsp3780I_EnableDSP: Error: DSP not enabled. Aborting. 3780i::dsp3780i_EnableDSP entry pSettings->bModemEnabled %x 3780i::dsp3780i_EnableDSP usDspBaseIO %x index %x taddr %x 3780i::dsp3780i_EnableDSP rSlaveContrl %x 3780i::dsp3780i_EnableDSP rSlaveControl 2 %x 3780i::dsp3780i_EnableDSP rSlaveControl 3 %x 3780i::dsp3780i_EnableDSP DSP_HBridgeControl %x rHBridgeControl %x 3780i::dsp3780I_EnableDSP exiting bRC=true, ChipID %x 3780i::dsp3780i_DisableDSP entry 3780i::dsp3780i_DisableDSP exit 3780i::dsp3780i_Reset rHBridgeControl %x 3780i::dsp3780i_Reset rBootDomain %x 3780i::dsp3780i_Reset exit bRC=0 3780i::dsp3780i_Run rHBridgeControl %x 3780i::dsp3780i_Run exit bRC=true 3780i::dsp3780I_ReadDStore entry usDspBaseIO %x, pusBuffer %p, uCount %x, ulDSPAddr %lx 3780I::dsp3780I_ReadDStore uCount %x val %x 3780I::dsp3780I_ReadDStore exit bRC=true 3780i::dsp3780I_ReadAndDStore entry usDspBaseIO %x, pusBuffer %p, uCount %x, ulDSPAddr %lx 3780I::dsp3780I_ReadAndCleanDStore uCount %x val %x 3780I::dsp3780I_ReadAndClearDStore exit bRC=true 3780i::dsp3780D_WriteDStore entry usDspBaseIO %x, pusBuffer %p, uCount %x, ulDSPAddr %lx 3780I::dsp3780I_WriteDStore uCount %x val %x 3780I::dsp3780D_WriteDStore exit bRC=true 3780i::dsp3780I_ReadIStore entry usDspBaseIO %x, pusBuffer %p, uCount %x, ulDSPAddr %lx 3780I::dsp3780I_ReadIStore uCount %x val_lo %x val_hi %x 3780I::dsp3780I_ReadIStore exit bRC=true 3780i::dsp3780I_WriteIStore entry usDspBaseIO %x, pusBuffer %p, uCount %x, ulDSPAddr %lx 3780I::dsp3780I_WriteIStore uCount %x val_lo %x val_hi %x 3780I::dsp3780I_WriteIStore exit bRC=true 3780i::dsp3780I_GetIPCSource entry usDspBaseIO %x pusIPCSource %p 3780i::dsp3780I_GetIPCSource, usIPCSource %x ~ %x 3780i::dsp3780I_GetIPCSource exit usIPCSource %x mwavedd::mwave_exit entry mwavedd::mwave_exit exit mwavedd::mwave_init entry drivers/char/mwave/mwavedd.cmwavesmapi::smapi_init entry drivers/char/mwave/smapi.ctp3780i::DspInterrupt exit tp3780i::EnableSRAM, entry tp3780i::EnableSRAM exit mwave_3780imwave_uartdrivers/char/mwave/tp3780i.c3780i::dsp3780i_Reset entry 3780i::dsp3780i_Run entry drivers/char/mwave/3780i.cparmtype=mwave_uart_io:intparmtype=mwave_uart_irq:intparmtype=mwave_3780i_io:intparmtype=mwave_3780i_irq:intparmtype=mwave_debug:intlicense=GPLauthor=Mike Sullivan and Paul Schroederdescription=3780i Advanced Communications Processor (Mwave) driversrcversion=8CD36B8BAF0F9DEF7B844D3depends=intree=Yname=mwaveretpoline=Yvermagic=6.13.0-rc1-MANJARO+ SMP preempt mod_unload  (0880(  (08`80( ` (0HPX`hHPX`hH (08`hpx`hpx`hpx`hpx`hpx`hpx`hpx`hpx`hpx`hpx`08@HP00  (8( 8H (080( 8 (080( 8 (08@80(   (08` (0(  (  (0( 0 (0( 0 (0( 0 (08@80(  (080(  (0(  `hph`H0( H`80( `0  8HH8@80(  `80( `0(0@800GNUGNU{R^<ዠC+Wڧy)LinuxLinux]2X;,[%$GCC: (GNU) 14.2.1 20240910GCC: (GNU) 14.2.1 20240910GCC: (GNU) 14.2.1 20240910GCC: (GNU) 14.2.1 20240910GCC: (GNU) 14.2.1 20240910GCC: (GNU) 14.2.1 20240910mwaveL-< U< < @t3*A*M3F3R j3 }3} 3 3 uint R ,3 *3As8^Au8qAs16Au16As32)Au32As64Au64gR n y 3 *  1R 2R H Iy X ] ^y _ `F33 <R  8 /    #|k3 % & ** 4 = B ]R h) n8 } B L L R R L 0 _  H  B k        F* @ @ PP@Ev\wx\y*W)       z KzH  A  L "[ ~   %(  z%0  ՚8  @  B#H  B#H B#H H B#H B#H  B#H  B#H+@   ]    UP %h  A A K _  d R 36kp i  R( R, _0  d8 k@ kA kB RD  nH PWmem s@ ۳ *  R         ( U0 R8 U@ RH RL P RX ` Rh p x R R %  R Ŷ R R % U R !% "R % &( 9R :϶ ? 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unsigned__compiletime_assert_506__compiletime_assert_507pcountrestore_noirqki_filpcap_ambientdma_configureruntime_erroratomic64_tanon_vmaruntime_autoPROBE_DEFAULT_STRATEGYrlimread_folionr_events__vpp_verifyiommuBLOCK_SOFTIRQprivatest_infomap_countsp_regexit_signalsa_restorerbpf_run_ctxsplice_pipemwave_uart_irqpDrvDatas_lock_keyupstat_tsrcu_gp_startopenDEVICE_PANEL_UNKNOWNit_real_incrmodert_prioritymm_lock_seqDEVICE_PANEL_RIGHTmodstqheads_activemwave_initclass_mutex_is_conditionalremap_file_rangenr_hangssym_vvar_startgid_twake_cpuchainedio_uring_taskactive_timertask_worksrb_root_cacheds_copc_ccdd_key_truehres_activebpf_raw_eventsdq_dirtydl_deferbug_listdirect_completequirksconst_typexa_lockfxregs_stateload_weightkuid_tarch_datafpstateblock_maxrcu_blocked_nodeverify_portgp_counttop_of_stackkey_restrictionexit_stateis_late_suspendedsysvsemignore_childrenrestore_earlyclock_mutexfs_supersmem_useddqb_bsoftlimitpendingf_task_workiowait_countRCU_SOFTIRQx_charMW_READWRITEdma_io_tlb_memstringread_countfutex_offsetlong long intatomic_flagssysvshmHI_SOFTIRQtimer_expirestrace_evalsactive_basesearly_initsecurityxmm_spaceactivatef_pos_lock__param_str_mwave_uart_irqi_fieldmasktls_arrayowneracct_rss_mem1need_mbvm_flags_trefcount_structi_bytesdomain_datarelax_countusUartBaseIOinCXusSndblstDMAclass_preempt_notrace_is_conditionalclass_srcu_is_conditionalmyoutBXmwave_3780i_irqclass_migrate_is_conditionalusPowerFunctionlong long unsigned intinSIusCXuartio_indexlocked_pendingusSmapiOKsmapi_requestinDIoutSIusMidiBaseIOclass_rwsem_read_is_conditionallong long intsigned charqspinlockusSIclass_preempt_is_conditionalmyoutCXsmapi_initlong intusDIclass_raw_spinlock_irq_is_conditionalSMAPI_DSP_SETTINGSusMidiIRQpmyoutAXspinlock_tusDXretvalclass_local_lock_nested_bh_is_conditionalclass_rwsem_read_try_is_conditionalmyoutSIbMIDIEnabledpi_entryclass_spinlock_irqsave_is_conditionallinemyoutDIclass_local_lock_is_conditionalmwave_uart_irqusSmapiID__u8ausDspIrqsraw_spinlock_tmyoutDXausDspBasesusSndblstBaseIO_raw_spin_unlock_irqrestoreunsigned int__int128class_irqsave_is_conditionalpmyoutBXlong unsigned intoutCXclass_spinlock_irqsave_try_is_conditionalclass_rcu_is_conditionalclass_spinlock_is_conditionallevel_entryinDISIshort unsigned intclass_local_lock_irqsave_is_conditionalclass_read_lock_is_conditionaloutAXbool__u16_printkpusSmapiOKclass_local_lock_irq_is_conditionaloutDIsmapi_set_DSP_power_stateclass_rwsem_write_is_conditionalclass_spinlock_irq_try_is_conditionalclass_spinlock_irq_is_conditionalpmyoutCXoutDXclass_disable_irq_is_conditionaltailclass_write_lock_irqsave_is_conditionalpendingclass_spinlock_try_is_conditionalclass_device_is_conditionallockedspinlockpmyoutSIusDspBaseIOclass_raw_spinlock_nested_is_conditionalsmapi_set_DSP_cfgmwave_3780i_iopmyoutDIausUartIrqsclass_mutex_is_conditional_entry_ptrclass_mutex_intr_is_conditionalspin_unlock_irqrestoreclass_task_lock_is_conditionalbDSPEnabledmax_slack_shiftpmyoutDXarch_spinlock_t_BoolbDSPPresentunsigned charcurrent_stack_pointershort intcounterfileclass_irq_is_conditionalausUartBasesrlock__func__outBX__stack_chk_failbSblstEnabledrtc_cmos_readclass_raw_spinlock_try_is_conditionallockclass_raw_spinlock_irqsave_is_conditionalcharfuncrtc_lockatomic_tGNU C11 14.2.1 20240910 -mno-sse -mno-mmx -mno-sse2 -mno-3dnow -mno-avx -m64 -mno-80387 -mno-fp-ret-in-387 -mpreferred-stack-boundary=3 -mskip-rax-setup -mtune=generic -mno-red-zone -mcmodel=kernel -mindirect-branch=thunk-extern -mindirect-branch-register -mindirect-branch-cs-prefix -mfunction-return=thunk-extern -mrecord-mcount -mfentry -march=x86-64 -g -gdwarf-5 -O2 -std=gnu11 -p -fshort-wchar -funsigned-char -fno-common -fno-PIE -fno-strict-aliasing -fcf-protection=branch -falign-jumps=1 -falign-loops=1 -fno-asynchronous-unwind-tables -fno-jump-tables -fpatchable-function-entry=16,16 -fno-delete-null-pointer-checks -fno-allow-store-data-races -fstack-protector-strong -ftrivial-auto-var-init=zero -fno-stack-clash-protection -fmin-function-alignment=16 -fstrict-flex-arrays=3 -fno-strict-overflow -fstack-check=no -fconserve-stackusDspDMAmwave_uart_ioexit_conflict__dummy2class_mutex_try_is_conditionalusSndblstIRQclass_write_lock_irq_is_conditionalinBXCXclass_raw_spinlock_irqsave_try_is_conditionalusAXexit_smapi_request_errorraw_spinlockclass_write_lock_is_conditionalsmapi_query_DSP_cfgclass_rwsem_read_intr_is_conditionalbModemEnabledinBXclass_read_lock_irq_is_conditionalusUartIRQpSettingsclass_raw_spinlock_is_conditionalmwave_debugflagsmyoutAXg_usSmapiPortclass_read_lock_irqsave_is_conditionalspinlock_checkraw_lockclass_rwsem_write_try_is_conditional__dummysubsys_fmt_prefixclass_raw_spinlock_irq_try_is_conditionalusBX_raw_spin_lock_irqsaveusDspIRQ__int128 unsigneddspio_indexbSblstEnabledlong intirqreturn_tclass_write_lock_irqsave_is_conditional__read_overflow2_field__kernel_ulong_tbMIDIEnabledLatch14irq_handler_tdsp3780I_ReadMsaCfgioport_resourcedsp3780I_WriteDStorelevelFORTIFY_FUNC_strcpy__flagsrGpioDriverEnablebDSPPresentclass_spinlock_try_is_conditionalpendingflagsMWAVE_IPCtp3780I_ReleaseResourcesclass_rwsem_read_is_conditionalFORTIFY_FUNC_memchr_invEnable10Enable11Enable12Enable13pi_entryunsigned intGNU C11 14.2.1 20240910 -mno-sse -mno-mmx -mno-sse2 -mno-3dnow -mno-avx -m64 -mno-80387 -mno-fp-ret-in-387 -mpreferred-stack-boundary=3 -mskip-rax-setup -mtune=generic -mno-red-zone -mcmodel=kernel -mindirect-branch=thunk-extern -mindirect-branch-register -mindirect-branch-cs-prefix -mfunction-return=thunk-extern -mrecord-mcount -mfentry -march=x86-64 -g -gdwarf-5 -O2 -std=gnu11 -p -fshort-wchar -funsigned-char -fno-common -fno-PIE -fno-strict-aliasing -fcf-protection=branch -falign-jumps=1 -falign-loops=1 -fno-asynchronous-unwind-tables -fno-jump-tables -fpatchable-function-entry=16,16 -fno-delete-null-pointer-checks -fno-allow-store-data-races -fstack-protector-strong -ftrivial-auto-var-init=zero -fno-stack-clash-protection -fmin-function-alignment=16 -fstrict-flex-arrays=3 -fno-strict-overflow -fstack-check=no -fconserve-stacknextbGateIOCHRDYbus_dma_bwusIPCSourceusHBusTimerLoadValuetp3780I_EnableDSPheadclass_raw_spinlock_irq_is_conditionalpresbEnablePwrMgmtEnable14Enable15free_irqdsp3780I_WriteMsaCfgsmapi_init__already_donehandlerbShareUartIrqwait_queue_headdsp3780I_WriteIStoreshort intclass_rwsem_write_is_conditionaluIStoreSizeIRQ_NONEbBDInitializedDSP_GPIO_DRIVER_ENABLE_15_8__compiletime_assert_100rDspSettings__compiletime_assert_102MWAVE_DEVICE_DATAusSndblstIRQ__compiletime_assert_105__compiletime_assert_106__compiletime_assert_107__compiletime_assert_108__compiletime_assert_109prevtp3780I_ClaimResourcesFORTIFY_FUNC_strcatclass_local_lock_nested_bh_is_conditional__ret_once__compiletime_assert_101tp3780I_DisableDSP__compiletime_assert_103__compiletime_assert_104smapi_set_DSP_power_stateclass_disable_irq_is_conditionalGpioMode10GpioMode11GpioMode12class_raw_spinlock_nested_is_conditionalGpioMode14GpioMode15mwave_os_namelong long unsigned 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charrSmapiInfoSMAPI_DSP_SETTINGSusSndblstBaseIOretvalFORTIFY_FUNC_memsetdsp3780I_Runlong long intrequest_irqusMidiBaseIOlockGpioMode13usIntCountq_sizelocked_pendingboolclass_raw_spinlock_is_conditionalcomponent_count__compiletime_assert_82__compiletime_assert_83__compiletime_assert_84class_write_lock_irq_is_conditional__compiletime_assert_86__q_size_field__compiletime_assert_88__compiletime_assert_89__write_overflow_field__ret_warn_onbUartIrqActiveLowrGpioOutputDatasizeclass_read_lock_is_conditionalclass_spinlock_irqsave_is_conditionalsLineclass_spinlock_irq_try_is_conditionalucSCRbios_task_namebIsEnabledbResourcesClaimedinstr_per_sectp3780I_StartDSPbMwaveDevRegistereduDmaBandwidth__compiletime_assert_90__compiletime_assert_91__compiletime_assert_92__compiletime_assert_93__compiletime_assert_94__compiletime_assert_95__compiletime_assert_96__request_region__compiletime_assert_98__compiletime_assert_99FORTIFY_FUNC_UNKNOWNusDspDMAs_numIrqsbDSPResetdev_idsubsys_fmt_prefixbDisableLBusTimeout_MWAVE_DEVICE_DATAFORTIFY_FUNC_memscanFORTIFY_FUNC_strnlenusN_Divisorclass_rwsem_read_try_is_conditionalpAbilitiesclass_srcu_is_conditional__u64FORTIFY_FUNC_strlcatusReRequestFORTIFY_FUNC_memcmpusNumTransfersclass_spinlock_is_conditionalnr_registered_attrsFORTIFY_FUNC_memmovearch_spinlock_tparentbShareDspIrq__warn_printkusM_Multiplierclass_local_lock_is_conditionalMW_ABILITIESbInterruptClaimedFORTIFY_FUNC_strscpyIRQ_HANDLEDmwave_3780i_ioclass_read_lock_irq_is_conditionalclass_rwsem_read_intr_is_conditionals_numDmas__stack_chk_failrBDDatamwave_debug__p_sizerGpioModedsp3780I_ReadAndClearDStore__fortify_sizeuCountdsp3780I_Resetspinlock_tucIERfortify_funcbUartIrqPulseLatch8bPllBypassnamestartp_size_fieldclass_mutex_is_conditionalMask8Mask9class_irq_is_conditional_MW_ABILITIESatomic_tbDspIrqPulseEnable8Enable9long unsigned int__u8wait_queue_head_tLatch10Latch11Latch12Latch13ucLCRLatch15FORTIFY_FUNC_kmemdupusSndblstDMApBDDatausUartIRQ__int128pSettingsusUartBaseIOresource_size_tunsigned charcomponent_listqspinlockline__ret_do_onceuart_enablefalseclass_rcu_is_conditional__read_overflow2raw_lock_entryclass_local_lock_irqsave_is_conditionalFORTIFY_FUNC_memcpy_MWAVE_IPClist_headusIsolationMaskbDspIrqActiveLowFORTIFY_FUNC_strncpyphys_addr_tusPCNumbInterruptAllocatedFORTIFY_FUNC_strncatfortify_memcpy_chkUartInterruptclass_local_lock_irq_is_conditionalusChipletEnable_DSP_3780I_CONFIG_SETTINGSclass_write_lock_is_conditionalDSP_3780I_CONFIG_SETTINGSulDSPAddrdsp3780I_GetIPCSourceshort unsigned intIPCsrlockusIsaMemCmdWidth__func__class_raw_spinlock_irqsave_is_conditionaldsp3780I_ReadIStoreclass_raw_spinlock_irq_try_is_conditionaltp3780I_Cleanup__int128 unsignedusDspBaseIOsmapi_set_DSP_cfgbDSPPoweredUpsmapi_query_DSP_cfgdsp3780I_ReadDStoredescusDspDmaFORTIFY_FUNC_strlen__compiletime_assert_87EnableSRAMuDStoreSizeusMidiIRQs_ausThinkpadDmaToFieldDSP_ISA_SLAVE_CONTROLclass_write_lock_irqsave_is_conditional__kernel_ulong_tfrompusBufferEnableDspIntdsp3780I_ReadMsaCfg__outbudelayraw_spinlock_tdsp3780I_WriteDStoreIrqPulse__bad_udelayval_hirHBridgeCfg1rHBridgeCfg2class_spinlock_try_is_conditional__outwrLBusTimeoutDisableflagskmsan_unpoison_memoryclass_rwsem_read_is_conditionalMemAutoIncpi_entryunsigned intGNU C11 14.2.1 20240910 -mno-sse -mno-mmx -mno-sse2 -mno-3dnow -mno-avx -m64 -mno-80387 -mno-fp-ret-in-387 -mpreferred-stack-boundary=3 -mskip-rax-setup -mtune=generic -mno-red-zone -mcmodel=kernel -mindirect-branch=thunk-extern -mindirect-branch-register -mindirect-branch-cs-prefix -mfunction-return=thunk-extern -mrecord-mcount -mfentry -march=x86-64 -g -gdwarf-5 -O2 -std=gnu11 -p -fshort-wchar -funsigned-char -fno-common -fno-PIE -fno-strict-aliasing -fcf-protection=branch -falign-jumps=1 -falign-loops=1 -fno-asynchronous-unwind-tables -fno-jump-tables -fpatchable-function-entry=16,16 -fno-delete-null-pointer-checks -fno-allow-store-data-races -fstack-protector-strong -ftrivial-auto-var-init=zero -fno-stack-clash-protection -fmin-function-alignment=16 -fstrict-flex-arrays=3 -fno-strict-overflow -fstack-check=no -fconserve-stackclass_write_lock_irq_is_conditionalbGateIOCHRDYbDisableLBusTimeoutDSP_CLOCK_CONTROL_1DSP_CLOCK_CONTROL_2__dummyclass_raw_spinlock_irq_is_conditionalbEnablePwrMgmtIsaMemCmdWidthMididsp3780I_WriteMsaCfgSoundBlasterlevelpDmaMapdsp3780I_WriteIStoreshort intclass_rwsem_write_is_conditionaluIStoreSizepvBufferbUartIrqActiveLowfuncrHBridgeControl__SCT__cond_reschedclass_local_lock_nested_bh_is_conditional__ret_guclass_raw_spinlock_nested_is_conditionalpusIPCSourceclass_preempt_is_conditional_entry_ptrclass_mutex_intr_is_conditionalucMCRbModemEnabledusUartIrqclass_irqsave_is_conditionalucDLLucDLM__kernel_size_tDSP_UART_CFG_1DSP_UART_CFG_2offsetsbEnableMEMCS16class_rcu_is_conditionallong long unsigned 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