ELF>i@@>=AWAVAAUAATAUSHAljADDSDSDDH[]A\A]A^A_ff.UHSHSHƉfHSHfSfH[]ATAUHSHSHƉfHSHfSDfH[]A\@AWE1AVE1AUIATUHSHH(DgwD$'1AMtYAEAM(Au DEɃ  AMfAwA`ftAA fDED$'AE$AM  AMLMA ȈD$AE CAE< AM> AM@ AMXD$&AED?fD$AEHD$AELD$AEPfD$AETD$AE`fD$ AEZf%? fD$$AE\D$ HDH$ff u1DffT$T$& T$ yT$hT$WT$FAEAAT$DfH4$HT$T$$T$ T$ 1A։T$'L@D$'AUSoHHøfSfHHS1[]f.AUATIUSHoHUIf؃fHLݺHSAT$`HH1[]A\A]ff.ATUSH_ALSLS1LSHSHffHHH1[]A\AVAAUAATIUHSHAUHDfLAUHfHEfAEu)oArHHDHfHAHDHt[]A\A]A^1fDAVAAUAATIUHSHAUHDfLAUHfHEfA Eu)oArHHDHfHAHDHt[]A\A]A^1fDAVAAUATIUHSHASHDfLSHfHEfEtsAIHDHƉfHAr$HHӅt[]A\A]A^1AWAVAAUAATIUHSHIHI@AVHDfLAVHfHEeE~ AFfD$EtzHDHfT$AfHAHUDHuKHDHu8As1H[]A\A]A^A_ff.AWAVAAUATAUHSHHHEH@AT$HƉfHAT$HfHEfEt{Eu HKHՅuvHHAׅucHDHƉfAUDfHAs1[]A\A]A^A_ff.AVAUATIUSHDsDIffffA4$fDfHL[1]A\A]A^3780i::dsp3780i_WriteGenCfg entry usDspBaseIO %x uIndex %x ucValue %x 3780i::dsp3780i_WriteGenCfg rSlaveControl %x 3780i::dsp3780i_WriteGenCfg entry rSlaveControl+ConfigMode %x 3780i::dsp3780i_WriteGenCfg exit 3780i::dsp3780I_ReadMsaCfg entry usDspBaseIO %x ulMsaAddr %lx 3780i::dsp3780I_ReadMsaCfg exit val %x 3780i::dsp3780i_WriteMsaCfg entry usDspBaseIO %x ulMsaAddr %lx usValue %x 3780i::dsp3780I_EnableDSP entry pSettings->bDSPEnabled %x 33780i::dsp3780I_EnableDSP: Error: DSP not enabled. Aborting. 3780i::dsp3780i_EnableDSP entry pSettings->bModemEnabled %x 3780i::dsp3780i_EnableDSP usDspBaseIO %x index %x taddr %x 3780i::dsp3780i_EnableDSP rSlaveContrl %x 3780i::dsp3780i_EnableDSP rSlaveControl 2 %x 3780i::dsp3780i_EnableDSP rSlaveControl 3 %x 3780i::dsp3780i_EnableDSP DSP_HBridgeControl %x rHBridgeControl %x 3780i::dsp3780I_EnableDSP exiting bRC=true, ChipID %x 3780i::dsp3780i_DisableDSP entry 3780i::dsp3780i_DisableDSP exit 3780i::dsp3780i_Reset rHBridgeControl %x 3780i::dsp3780i_Reset rBootDomain %x 3780i::dsp3780i_Reset exit bRC=0 3780i::dsp3780i_Run rHBridgeControl %x 3780i::dsp3780i_Run exit bRC=true 3780i::dsp3780I_ReadDStore entry usDspBaseIO %x, pusBuffer %p, uCount %x, ulDSPAddr %lx 3780I::dsp3780I_ReadDStore uCount %x val %x 3780I::dsp3780I_ReadDStore exit bRC=true 3780i::dsp3780I_ReadAndDStore entry usDspBaseIO %x, pusBuffer %p, uCount %x, ulDSPAddr %lx 3780I::dsp3780I_ReadAndCleanDStore uCount %x val %x 3780I::dsp3780I_ReadAndClearDStore exit bRC=true 3780i::dsp3780D_WriteDStore entry usDspBaseIO %x, pusBuffer %p, uCount %x, ulDSPAddr %lx 3780I::dsp3780I_WriteDStore uCount %x val %x 3780I::dsp3780D_WriteDStore exit bRC=true 3780i::dsp3780I_ReadIStore entry usDspBaseIO %x, pusBuffer %p, uCount %x, ulDSPAddr %lx 3780I::dsp3780I_ReadIStore uCount %x val_lo %x val_hi %x 3780I::dsp3780I_ReadIStore exit bRC=true 3780i::dsp3780I_WriteIStore entry usDspBaseIO %x, pusBuffer %p, uCount %x, ulDSPAddr %lx 3780I::dsp3780I_WriteIStore uCount %x val_lo %x val_hi %x 3780I::dsp3780I_WriteIStore exit bRC=true 3780i::dsp3780I_GetIPCSource entry usDspBaseIO %x pusIPCSource %p 3780i::dsp3780I_GetIPCSource, usIPCSource %x ~ %x 3780i::dsp3780I_GetIPCSource exit usIPCSource %x H ڃD$Du At$HDAHDSDSDD$XH[]A\A]A^A_HHHHHHHHA}t+AuHHH([]A\A]A^A_H1҉HHA׾HHHHHHHT$T$HHHT$T$HIHHADHHIHHADHHIHHDHHIHHAADHHIHHADHLHA4$HHA$3780i::dsp3780i_Reset entry 3780i::dsp3780i_Run entry drivers/char/mwave/3780i.cdsp3780I_GetIPCSourcedsp3780I_WriteIStoredsp3780I_ReadIStore_zdsp3780I_WriteDStore6JRdsp3780I_ReadAndClearDStore  (dsp3780I_ReadDStoredsp3780I_Rundsp3780I_Resetdsp3780I_DisableDSPi{dsp3780I_WriteGenCfgtzdsp3780I_EnableDSP"*6N[dsp3780I_WriteMsaCfgbdsp3780I_ReadMsaCfgNXHx\{tTչ?{L2 yM !W!" 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